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2001-02 session

CS2042 Architectural Support for Languages and Operating Systems

Level: 2
Credit Rating: 10
Degree(s): CS SE CE CIS CS4 AI
Pre-requisites: CS1001 or CS1011, CS1031, CS1062 in 2001, CS1092 in 2002, CS2051.
Co-requisites: None
Pre-requisite for: CS3001, CS3012
Duration: 12 weeks in second semester
Lectures: 24, 2 per week
Examples Classes: 5, 1 per fortnight
Tutorials: none
Laboratories: 10, 5 x 2-hour, partly credited to CS2910/CS2920
Assessment: 2-hour examination 90%, laboratory 10%.
Laboratory mark also contributes to CS2910/CS2920.
Lecturers: Professor S B Furber and Dr A J West
Aims

To provide an understanding of the nature and variety of modern computer architectures by examining the major tasks which such an architecture must support. Namely (a) the execution of programs written in high level languages, (b) operating systems to support multiple users and applications, and (c) common enhancements necessary for performance.
Reading List and Supporting Material

Learning Outcomes:

On completion of this course unit a student should:
  1. Have a knowledge and understanding of the relationship between the important imperative high level language structures and their realisation at the machine level. (A)
  2. Have practical experience of analysing and solving problems associated with the material above. [from examples classes which pose problems, using output from a compiler] (B)
  3. Have a knowledge and understanding of the basic features in an architecture necessary to support a modern operating system. (A)
  4. Have developed code to exercise understanding of virtual memory systems. (C)
  5. Gain experience of working within strictly administered deadlines for a single substantial programming exercise used in the module. (D)
  6. Have a knowledge and understanding of inter-process communication support at the instruction set level, and the issues of its application in a multi-processor environment. (A)
  7. Have a knowledge and understanding of inter-process, and process/kernel protection issues and realisation in the underlying architecture. (A)
  8. Have a knowledge and understanding of important performance enhancements in modern architectures, including pipelining, and memory interleaving. (A)

  9. Assessment of Learning Outcomes:

    Learning outcomes (1), (3), (6), (7) and (8) are assessed by examination.
    Learning outcome (2) is a self-assessment based upon examples-class material. Students are provided with questions and assistance in examples classes. Solutions to these examples are made available after the classes.
    Learning outcomes (4) and (5) are assessed in a practical laboratory, after initial design, and at two stages of the development of the program.
    Programme learning outcomes
    A3, B1, C1, C5, D5

    Syllabus


    Introduction [1]

    Aims of the course and an introduction to the laboratory exercises.

    Architectural support for high-level languages [7]

    Choices in instruction sets: Multi/few registers, stacks. Addressing modes, number of addresses in an instruction, instruction set complexity. Implications of the instruction set on computer architecture. CISC versus RISC architectures. As examples, the machine code produced when the following are compiled from a high-level language:

    Scalar arithmetic: expressions.
    Data structures: heaps, structures, files, arrays, descriptors
    Control constructs: function calls, branches, Boolean conditionals.
    Variables: local and global, parameters and results.
    Runtime stack

    Architectural support for operating systems [7]

    Virtual memory, address translation. Caching (OS implications for performance). Multi-processor cache coherency. Concept of the virtual machine. High level view of co-operating processors:- - Problems (synchronisation, exclusion, signalling). Solutions (hardware and software). Controlling access to resources.

    Support for higher computational performance [8]

    Performance metrics. Memory interleaving. Instruction pipelines. Pipelines difficulties and solutions.

    RISC case study[1]


    A timetable and/or additional information might be available for this course.
    Contents page List of course units offered

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